Here is a capacitive version
This is a lousy design. Honestly, where do people get off with this sort of stuff??
I'm not going to pick on several particularly poor choices they've made, but what I WILL point out is the reason I really hate it, and why my suggestions (above) were as they were.
Capacitors, as you know, have an "equivalent" resistance at a particular frequency. So a 1uF cap for example, if given a 1KHz sinewave will behave much like a 159 ohm resistor. Change the frequency to 10KHz and it looks like a 15.9 ohm resistor.
The circuit, as shown, is a capacitor (formed by the wire in the plug lead as one plate, the insulation of the plug lead as a dielectric, and the metal clip as the other plate). That's fed to a resistor (and the SCR gate), with absolutely no current limiting). Lets assume the clip forms a capacitor of 100pf (just for convenience).
Lets say the sparkplug is firing at just 20 times a second. Some would say 20Hz, 100pF, 79 megohms.
So we have a divider with a 20KV spark, 79M resistor to a 3K3 resistor as the divider.
We should get about 835mV out. Might just trigger the SCR.
The reality is, a spark has a VERY fast risetime. To the capacitor, it's going to behave more like 100KHz
At that frequency it's looking more like 16K. 20KV and you're going to get something like 3.4KV at the divider (because the resistor is still 3K3). The 1N4148 is facing the wrong way to clamp it, the SCR gate will need to. While the pulse is short, there's a lot of stress on things.
Using a capacitor+capacitor divider, both caps will see the same "signal frequency". Regardless of the pulse risetime, the divider RATIO will remain the same. This is true for R+R and C+C but not R+C or C+R dividers.